Introduction:
????DFT?Engineer?works?on?the?MBIST?development?for?our?internal?requirements?or?design?service?requirements?from?worldwide?clients.?By?employing?the?industry?leading?tools,?state?of?the?art?methodology,?and?innovative?our?technologies,?you?will?be?participating?in?the?DFT?architecture?definition,?implementation?and?verification.
????Your?Job:
?????????Block/Chip?level?DFT?feature?and?architecture?definition.
?????DFT?specification?generation?and?review?with?chip?designers.
?????Implement?block/?chip?level?SCAN,?BSD,?MBIST?and?IP?macro?test.
?????Verify?the?DFT?structures,?and?deliver?quality?production?ATE?patterns.
?????Deliver?DFT?timing?constraints?and?support?BE?team?for?timing?closure.
?????Support?ATE?bring-up,?and?debug?the?ATE?patterns.
?????Support?logic?scan/MBIST?etc.?DFT?diagnosis?for?yield?improvement.
Required?Qualifications:
?????????????Master?degree?in?EE/CS?or?related?fields.
?????3?years?and?above?work?experiences?of?DFT?design?implementation
?????Fluent?in?both?written?and?verbal?English.
Preferred?Qualifications:
?????????????Familiar?with?DFT?methodology,?including?scan,?BIST,?JTAG,?ATPG.
?????Familiar?with?Siemens?Tessent?or?Synopsys?SMS/TetraMax.
?????Familiar?with?Shell,?Perl?or?TCL?script.
?????Good?skills?in?test?patterns?development.
?????Experience?in?DFT?logic?simulation?and?coverage?analysis.
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